Performance of hierarchical multiplexing in ATM switch design

Mark J. Karol, Kai Y. Eng

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

16 Scopus citations

Abstract

The interface data rates to the external lines (i.e., line card data rates) can be and usually are different from the internal core fabric speed of an ATM switch. As signals are multiplexed inside the switch to higher speeds, the required dimension of the core fabric is reduced, leading to a reduction in physical size, easing of input/output (I/O) constraints, simpler control, and improved hardware efficiency. Our simulation results, for random and bursty traffic models, indicate that this hierarchical multiplexing technique has little impact on the delay-throughput performance. Our results also show that a small degree of multiplexing dramatically increases the buffer requirements. However, further multiplexing reduces the amount of buffering down to more acceptable levels.

Original languageEnglish
Title of host publication1992 International Conference on Communications
Subtitle of host publicationDiscovering a New World of Communications, SUPERCOMM/ICC 1992 - Conference Record
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages269-275
Number of pages7
ISBN (Electronic)078030599X
DOIs
StatePublished - 1992
Event1992 IEEE International Conference on Communications: Discovering a New World of Communications, SUPERCOMM/ICC 1992 - Chicago, United States
Duration: 14 Jun 199218 Jun 1992

Publication series

NameIEEE International Conference on Communications
ISSN (Print)1550-3607

Conference

Conference1992 IEEE International Conference on Communications: Discovering a New World of Communications, SUPERCOMM/ICC 1992
Country/TerritoryUnited States
CityChicago
Period14/06/9218/06/92

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