A growable packet (ATM) switch architecture: Design principles and applications

Kai Y. Eng, Mark J. Karol, Yu Shuan Yeh

Research output: Contribution to journalArticlepeer-review

63 Scopus citations

Abstract

The problem of designing a large high-performance, broadband packet or ATM (asynchronous transfer mode) switch is discussed. Ways to construct arbitrarily large switches out of modest-size packet switches without sacrificing overall delay/throughput performance are presented. A growable switch architecture is presented that is based on three key principles: a generalized knockout principle exploits the statistical behavior of packet arrivals and thereby reduces the interconnect complexity, output queuing yields the best possible delay/throughput performance, and distributed intelligence in routing packets through the interconnect fabric eliminates internal path conflicts. Features of the architecture include the guarantee of first-in-first-out packet sequence, broadcast and multicast capabilities, and compatibility with variable-length packets, which avoids the need for packet-size standardization. As a broadband ISDN example, a 2048 × 2048 configuration with building blocks of 42 × 16 packet switch modules and 128 × 128 interconnect modules, both of which fall within existing hardware capabilities, is presented.

Original languageEnglish
Pages (from-to)423-430
Number of pages8
JournalIEEE Transactions on Communications
Volume40
Issue number2
DOIs
StatePublished - 1992

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