TY - GEN
T1 - A FLEXIBLE BROADBAND PACKET SWITCH FOR A MULTIMEDIA INTEGRATED NETWORK
AU - Woodworth, Clark B.
AU - Karol, Mark J.
AU - Gitlin, Richard D.
N1 - Publisher Copyright:
© 1991 IEEE.
PY - 1991
Y1 - 1991
N2 - In this paper, we propose a "flexible"switch architecture that can be the basis of high-performance packet switches for B-ISDN nodes, LANs, and PBXs. This switch is being implemented for our Multimedia Integrated Network for Telecommunications (MINT) project, which will support voice, video and data traffic. The switch fabric supports multiple priorities, has a programmable service policy, and has several field-selectable options to match system requirements. In addition, the number of cell buffers and the number of input/output ports all can be easily increased when needed. However, the architecture is most appropriate for small (e.g., up to 32X32) broadband packet (ATM) switches, because the internal switch fabric is fully-connected. The switch uses "output queueing"to achieve the best possible delay-throughput performance. Cells are stored in RAMs, rather than FIFOs, thereby exploiting the memory density of RAM chips and permitting cells of different priorities to use the same chip. The switch allows RAM-based buffer sharing, and judiciously wastes some of the memory to simplify the switch's control circuitry. Also, it supports link-level flow control, if desired.
AB - In this paper, we propose a "flexible"switch architecture that can be the basis of high-performance packet switches for B-ISDN nodes, LANs, and PBXs. This switch is being implemented for our Multimedia Integrated Network for Telecommunications (MINT) project, which will support voice, video and data traffic. The switch fabric supports multiple priorities, has a programmable service policy, and has several field-selectable options to match system requirements. In addition, the number of cell buffers and the number of input/output ports all can be easily increased when needed. However, the architecture is most appropriate for small (e.g., up to 32X32) broadband packet (ATM) switches, because the internal switch fabric is fully-connected. The switch uses "output queueing"to achieve the best possible delay-throughput performance. Cells are stored in RAMs, rather than FIFOs, thereby exploiting the memory density of RAM chips and permitting cells of different priorities to use the same chip. The switch allows RAM-based buffer sharing, and judiciously wastes some of the memory to simplify the switch's control circuitry. Also, it supports link-level flow control, if desired.
UR - http://www.scopus.com/inward/record.url?scp=85033738281&partnerID=8YFLogxK
U2 - 10.1109/ICC.1991.162339
DO - 10.1109/ICC.1991.162339
M3 - Conference contribution
AN - SCOPUS:85033738281
T3 - IEEE International Conference on Communications
SP - 78
EP - 85
BT - International Conference on Communications, ICC 1991
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 1991 IEEE International Conference on Communications - Communications: Rising to the Heights, ICC 1991
Y2 - 23 June 1991 through 26 June 1991
ER -